InterruptEnabler.h
Go to the documentation of this file.00001 /******************************************************************************* 00002 * 00003 * Copyright (c) 2008-2010 Michael Schulze <mschulze@ivs.cs.uni-magdeburg.de> 00004 * All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 00010 * * Redistributions of source code must retain the above copyright 00011 * notice, this list of conditions and the following disclaimer. 00012 * 00013 * * Redistributions in binary form must reproduce the above copyright 00014 * notice, this list of conditions and the following disclaimer in 00015 * the documentation and/or other materials provided with the 00016 * distribution. 00017 * 00018 * * Neither the name of the copyright holders nor the names of 00019 * contributors may be used to endorse or promote products derived 00020 * from this software without specific prior written permission. 00021 * 00022 * 00023 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 00024 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 00025 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 00026 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 00027 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 00028 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 00029 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 00030 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 00031 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00032 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 * 00036 * $Id$ 00037 * 00038 ******************************************************************************/ 00039 00040 #ifndef __InterruptEnabler_h__ 00041 #define __InterruptEnabler_h__ 00042 00043 #ifdef __AVR__ 00044 #include <avr/io.h> 00045 typedef uint8_t storage; 00046 #else 00047 typedef uint32_t storage; 00048 #endif 00049 00050 namespace famouso { 00051 namespace mw { 00052 namespace nl { 00053 namespace CAN { 00054 namespace etagBP { 00055 00064 class InterruptEnabler { 00065 storage _ints; 00066 public: 00070 InterruptEnabler(); 00071 00074 ~InterruptEnabler(); 00075 00080 void process(); 00081 }; 00082 00083 #ifdef __AVR__ 00084 inline InterruptEnabler::InterruptEnabler() : _ints(SREG) { 00085 sei(); 00086 } 00087 00088 inline InterruptEnabler::~InterruptEnabler(){ 00089 SREG=_ints; 00090 } 00091 00092 inline void InterruptEnabler::process() { 00093 // nothing to do here, because interrupts are allowed 00094 // and the core is driven that way on AVRs 00095 } 00096 #endif 00097 } 00098 } /* namespace CAN */ 00099 } /* namespace nl */ 00100 } /* namespace mw */ 00101 } /* namespace famouso */ 00102 00103 00104 #endif 00105